Ragesh Hajela – Fujitsu
Chiranmoy Bhattacharya – Fujitsu
As Arm CPUs become increasingly prevalent in data centers and high-performance computing, optimizing core database operations for vector performance is critical. To enable PostgreSQL to take full advantage of modern Arm architectures, we contributed the first-ever integration of Scalable Vector Extensions (SVE) into PostgreSQL. This work delivers a portable, vector-length-agnostic SIMD backend that boosts performance across a wide range of SVE-enabled Arm CPUs.
Our initial patch introduced vectorized versions of critical routines and setting the foundation for broader SIMD acceleration in PostgreSQL. First contribution introduced SVE-accelerated pg_popcount, used in visibility map operations that are fundamental to ANALYZE and VACUUM commands. This change delivered up to 7x speedup for that function on SVE-enabled platforms. Our second contribution focuses on optimizing hex encoding/decoding for bytea data types using SVE, achieving up to 10x speedup for these routines. Together, these improvements contributed upto ~11% performance gain on few queries in the TPC benchmarks.
These kernels are written using Arm SVE intrinsics and designed to scale with vector lengths from 128 to 512 bits, enabling performance portability across CPUs like AWS Graviton, A64FX, NVIDIA Grace, and Fujitsu’s upcoming MONAKA Processor (SVE2, 256-bit).
This talk will detail the motivation, design, and implementation of SVE support in PostgreSQL, discuss upstream collaboration, and present early performance metrics. We’ll also explore how this vectorization effort aligns with PostgreSQL’s long-term goals for extensibility and multi-architecture performance optimization.